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Tutorial 57 November 2005

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OVERVIEW

This is the latest in a series of flip chip tutorials intended for new flip chip users, potential users, and those interested in specific flip chip processes and applications. Tutorial #1 presents the basics: an overview of what flip chip is and does, and how it is made. The other tutorials cover a wide range of topics in more detail. Concurrently, FlipChips Dot Com’s Technology Updates present industry experts describing the newest developments in their fields; our Literature and Photo pages give supplemental material.

Thermosonic Bonding of 1,000-bump Flip Chips

An extended abstract of the paper
"Thermosonic bonding of high pin count flip-chips on flexible substrates"

by Gerard Kums, Jan van Delft, and Hans de Vries
PHILIPS Applied Technologies
Glaslaan 2, 5060MD Eindhoven, The Netherlands

Introduction

Philips Applied Technologies has demonstrated the feasibility of thermosonic flip chip bonding for display drivers with more than 1,000 connections onto polyimide foil (COF). Thermosonic bonding is a low-temperature fine-pitch alternative to the thermocompression bonding commonly used for display drivers.

Thermocompression processes use a combination of pressure and temperature to create bonds. Figure 1 shows the temperature and pressure regimes of several thermocompression processes. These high temperature processes often pose problems for long, fine pitch ICs with pin counts above 600. The thermal expansion mismatch between the silicon and the polyimide foil makes accurate alignment a problem, even with artwork compensation.

The low temperature solders and adhesives shown in Figure 1 and similar processes are alternatives to thermocompression, but they are limited to IC pitches above 50 m m. Low temperature solder also risks melting during subsequent interconnect processes.

Thermosonic bonding replaces part of the thermal bonding energy with ultrasonic energy. This allows non-melting metal to metal interconnections to be made within seconds, at temperatures below 150 ºC and at pitches below 30 m m.

Thermosonic bonding is used in mass production for bonding relatively small size ICs on ceramic substrates. Thermosonic bonding of large ICs is problematic, because it requires a very high co-planarity and homogeneity of the applied ultrasonic energy, as well as a relatively high bonding pressure.

Figure 1. Time / pressure domain for flip-chip bonding

Experimental set-up

Figure 2 shows our first COF test carrier. It includes test lands to measure interconnect continuity and adjacent bump isolation. The test flip chip has the high length to width ratio typical of display driver ICs. Bump pitch varies from 56 to 40 m m. Table 1 summarizes the characteristics of the carrier.

Figure 2. Test Carrier 1.

Table 1: Characteristics of Test Carrier 1

Test Carrier1 (TC1)

Parameter

Value

Chip size

2.7 x 18.7 mm

Number of bumps

870

Bump pitch

variable 56 - 40 m m

Bump length

80 m m

Bump spacing

10 m m (at 40 m m pitch)

Bump type

17 m m, Au, electroplated

Test structures

4 point resistance, continuity & isolation

Carrier foil

25 m m polyimide, Kapton E adhesiveless

Cu thickness

12 m m

Finish

1 m m Ni + 0.4 m m Au

Finest pitch bonding

Today gold-tin solder or ACP can produce COF bonds with pitches down to 35 m m. We established that thermosonic bonding reaches even smaller pitches. Figure 3 shows the test carrier with bump pitches down to 24 m m. Table 3 lists its characteristics.

Figure 3 Test carrier 2.

Table 3 : Characteristics of Test Carrier 2

Test Carrier 2 (TC2)

Parameter

Value

Chip size

2.3 x 17.1 mm

Number of bumps

1120

Bump pitch

variable 40 - 24 m m

Bump length

80 m m

Bump spacing

8 m m (at 24 m m pitch)

Bump type

17 m m Au electroplated

Test structures

4 pt Kelvin, continuity & isolation

Carrier foil

38 m m polyimide

Cu thickness

5 m m

Finish

1 m m Ni + 0.7 m m Au

As shown in Figure 4, with Test Carrier 2 we achieved near-perfect alignment between bump and track on the 4 corners of the 17.1 mm long chip. This confirms that, with a bonding tool at only 100 ºC, there is little problem with thermal expansion mismatch between IC and foil. The alignment between the chip and the foil depends mainly on the accuracy of the foil, and the capabilities of the bonding equipment. Figure 5 shows bumps produced with Test Carrier 2 at pitches ranging from 32 m m to 24 m m.

Figure 4. Alignment result (4 corners of IC)

Figure 5. Bumps at pitches from 32 m m (left) to 24 m m (right).

Conclusions

Our work shows that thermosonic bonding is a promising technology for bonding very high pin count, very fine pitch flip chips on polyimide foils. The relatively low process temperature elegantly avoids problems with the thermal expansion mismatch between IC and foil, allowing excellent alignment at pitches down to 24 m m.

Bump hardness, UBM structure, bonding pressure and amplitude are the most critical parameters for thermosonic bonding. The process window is defined on one side by the need for bump collapse to compensate non co-planarity between bumps and track, and on the other side the risk for excessive bump deformation and UBM damage by too high pressure and amplitude settings. Environmental Stress Testing verified process feasibility at optimum parameter settings.

FOR MORE INFORMATION

The complete paper with citations and supporting details is available on the CD "IMAPS 2005 38th Annual Symposium on Microelectronics," available from IMAPS.

Philips Applied Technologies is part of Royal Philips Electronics and supports Philips, its partners and suppliers, as well as a selected number of non-Philips companies, through the application of a wide range of technologies.


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