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Tutorial 55 September 2005

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OVERVIEW

This is the latest in a series of flip chip tutorials intended for new flip chip users, potential users, and those interested in specific flip chip processes and applications. Tutorial #1 presents the basics: an overview of what flip chip is and does, and how it is made. The other tutorials cover a wide range of topics in more detail. Concurrently, FlipChips Dot Com’s Technology Updates present industry experts describing the newest developments in their fields; our Literature and Photo pages give supplemental material.

The Promise of C4NP

Dr. George Riley
FlipChips Dot Com

IBM and SUSS MicroTec recently introduced the first new solder bumping process to reach the market in the 21st century. C4NP is built around IBM's development of injection-molded solder, assisted by SUSS MicroTec's mastery of wafer alignment tooling.

Solder bumps are formed in molds matching the wafer pads. In a separate operation at any later time, the molded bumps are transferred to the wafer. Figure 1 diagrams the process flow. The C4NP process applies to any solder available in bulk metal form, including all of the lead-free alloys, and accommodates 300mm wafers.

Figure 1. C4NP Process Diagram. (Courtesy IBM)

Separating bump formation from wafer processing provides several direct and indirect advantages. Separation reduces the handling of fully processed wafers, and therefore the related yield losses from wafer damage or breakage. It also isolates expensive wafers from the yield losses attendant to failures in on-wafer bump formation.

Processing wafers and bumps in parallel, rather than serially, shortens line throughput time. Bumping the wafers is done in minutes, not hours or days. For fast-turn lots, bump molding can be completed while the wafers are still in process, so that bumping is just a reflow away from wafer fab.

Injection molding of bumps has advantages beyond those of line separation. The versatility of easily adapting to all solders and all wafer sizes is a line scheduler's dream. Changing solder formulations to any other alloy requires only changing fill heads.

Final assembly yield should increase, because bumps are fully inspected prior to transfer and can be reworked as needed, The molding process gives void-free bumps with excellent control of bump height, further raising yields. Standard environmental stress tests were passed with no failures, matching or exceeding the performance of other bumping methods. [2]

Using bulk solder is another cost saver. The solder may be in wires, pellets, or any convenient form, as compared to more expensive and less convenient pastes, preforms, plating solutions, or spheres. Molding is thrifty in using that solder, with essentially zero waste in the filling process. Eliminating solder waste can be a major cost saving with expensive lead free alloys.

In short, C4NP as detailed above has demonstrated high quality, great versatility, and fine pitch. In addition, based on the process savings and yield advantages noted above, and on sample line data, IBM projects C4NP as being the lowest overall cost bumping process.

These advantages of C4NP are perhaps best judged by comparison to the presently common bumping methods of evaporation, plating, and printing. Table 1 compares C4NP to the contenders.

 

Table 1. Comparison of Solder Bumping Processes [1]

Process

Evaporation

Plating

Screening

C4NP

Cost

Medium/High

High

Medium

Low

Reliability

High

High

Low

High

Yield

Medium/High

High

Medium/Low

High

Manufacturing Flexibility

Medium

Low

High

High

Engineering Support

Medium

High

Low

Low

Infrastructure Required

Medium

High

Low

Low

Industry Proven

Yes

Yes

Yes

No

 

In summary, evaporation is high quality and medium to high cost, splendid in its day, but unable to cope with today's mainstream challenges of lead free 300mm wafers. Plating is high quality, fine pitch, low flexibility, high complexity, and high cost. Printing offers lower but acceptable commercial quality, coarse pitch, and low cost.

IBM projects C4NP to be the best of both possible worlds, with quality and pitch equal to that of plating and cost below that of printing. [3] If these projections hold true in the real world of volume manufacturing, we may have a low-cost solution to many of the problems of lead-free solder bumping.

REFERENCES

[1] Barry Hochlowski et al., "Low-Cost Wafer Bumping Using C4NP," Future Fab International, 18, #19, 12 January 2005

[2] Peter A. Gruber et al., "Injection Molded Solder Technology for Pb-free Wafer Bumping," Proc. IEEE 54th Electronics Components and Technology Conference, 2004.

[3] Klaus Ruhmer et al., "C4NP: New Solder Bumping Technology – Low Cost and Lead Free," IMAPS Flip Chip Advanced Technology Workshop, Austin, Texas, June 20, 2005.

FOR MORE INFORMATION

IBM / SUSS MicroTec C4NP Links

Tutorial 56, on this site, gives more details and a video of the injection molded solder (IMS) process.


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