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OVERVIEW
This is the latest in a series of flip chip tutorials intended for new flip chip users and potential users. Tutorial #1 presents the basics: an overview of what flip chip is and does, and how it is made. Other tutorials, in the Archives, explain the topics in more detail. Concurrently, FlipChips Dot Com’s Technology Updates present industry experts describing the newest developments in their fields; our Literature and Photo pages give supplemental material.
Tutorial Twenty, "Causes of Misalignment," is excepted from Chapter 10, "Flip Chip Reflow Attachment," in Dr. Ning-Cheng Lee's new book on reflow processes and related technologies.
A review of Dr. Lee's book is posted in Books. The book may be ordered on-line directly from www.Amazon.com:
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10.2.1 Misalignment
Misalignment in flip chip, as shown in Figure 10.22 [6], will compromise reliability and thus will have to be minimized. Noreika et al. [17] have reported that flip chip self-centering capability is impressive, given the minimal initial chip-to-board contact area prior to reflow. The study suggests that self-alignment occurs at up to 60 percent misplacement, validating the accepted rule of 50 percent minimum bump-to-pad overlap. However, defect rates increased rapidly at linear misplacements beyond this range. The array configuration of flip chips appears to tolerate large amounts of rotational skew. This is because the relative shift of bumps near the centroid is far less than those bumps near the perimeter, providing more bump-to-pad contact area, thus a greater associated self-centering force.
Causes of misalignment
Misalignment can be caused by:
- excessive misregistration
- low flux tackiness
- conveyor is not flat and stable
- unbalanced gas flow in oven
- poor support of PCB during reflow
- reflow profile [2]
- insufficient fluxing activity
- oxidative reflow atmosphere
- inadequate solder mask opening
The first five causes belong to mechanical perturbation and are self-evident. Figure 10.23 shows the effect of placement accuracy on placement defect rate [4] for 200 micron (micrometers) nominal pad width. A placement accuracy of 11 microns is sufficient to render a 1 part per million defect rate, indicating the demand on machine accuracy is not extremely high. Due to the light mass of a flip chip, a high gas flow rate in the oven may blow the flip chip away from its site. If a flux with a higher tack value is not available, reducing the gas flow rate will be mandatory.
Cause (6) is related partially to mechanical perturbation and partially to a fluxing reaction. For a reflow profile with a fairly high ramp rate, the flux may outgas vigorously and cause shifting of the flip chip. On the other hand, if the ramp rate is too slow, the flux may burn off prematurely, before self-alignment is complete. Without flux, the oxide on the molten solder and board pad will prevent a full wetting. It will also cause a lower apparent surface tension of solder, hence resulting in weaker driving force for self-alignment.
Causes (7) and (8) are related to fluxing reaction. A compromised fluxing, due either to insufficient fluxing reaction, or to excessive oxide formation, will result in incomplete oxide removal, and accordingly obstruct self-centering. It has been seen that, although flip chip attachment onto a PCB can be processed together with SMT components in an air atmosphere, self-centering has suffered. Use of a nitrogen atmosphere eliminated this problem
Cause (9) relates to physical constraints caused by too small a solder mask opening [17]. The flip chip bumps mate to corresponding board pads, with pad dimensions typically defined by the solder mask openings on the board surface, as shown in Figure 10.24. These solder mask openings are usually slightly larger than the bump diameter. Chip placement outside this tolerance results in mechanical interference between bumps and the wall of the opening, tilting the chip and preventing proper contact with the board during solder joint formation. By widening the solder mask opening, the defect rate will reduce significantly, as shown in Figure 10.25 [4].
However, it should be kept in mind that while a wider opening results in a higher self-centering success rate, it also causes a lower standoff for the solder joints, thereby compromising reliability. Solder mask registration accuracy is also an integral part of flip chip attachment placement requirements, and can be critical to chip yield attach.
excerpted by permission from Chapter 10 in Reflow Soldering Processes and Troubleshooting: SMT, BGA, CSP, and Flip Chip Technologies
by Ning-Cheng Lee Copyright 2002, Newnes, Boston, MA
An Imprint of Elsevier Science
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