This is the latest in a series of flip chip tutorials intended for new flip chip users and potential users. Tutorial #1 presented the basics: an overview of what flip chip is and does, and how it is made. Further tutorials, also found in the Archives, explain the topics in more detail. Concurrently, FlipChips Dot Com’s Technology Updates present industry experts describing the newest developments in their fields; our Literature and Photo pages give supplemental material.

In Tutorial 2, Solder Bump Flip Chip, we described electroless plated nickel as a common under-bump metallization (UBM) for solder bump flip chip. However, another application of the electroless nickel - gold (Ni-Au) process to flip chip packaging is for forming bumps. Electroless nickel plating provides flat, uniform bumps through simple, low cost, low temperature, wet chemistry processes requiring little capital equipment. In this tutorial we discuss electroless Ni-Au flip chip bumping and assembly.

The electroless Ni-Au bumping process uses common plating techniques to replace the aluminum oxide layer on integrated circuits with a conductive nickel bump suitable for interconnection by various flip chip assembly methods.

Flip chip bumping of integrated circuits having the usual aluminum bond pads requires removing the insulating aluminum oxide layer from the bond pad surface and making good electrical connection to the underlying metal. In the Ni-Au process, oxide removal and surface activation is commonly done through zinc displacement plating, using a zincate solution. The bump is then formed by selective electroless plating of nickel in a wet chemical, maskless process.

While zincation is an old process in plating chemistry, its application to microelectronics required careful development and precise control, because of the thin metal layers, the variety of other materials present, and the need for a strong, reliable resulting film. Several companies have developed proprietary variations of the generic process described here.

Prior to zincation, the wafer is pre-cleaned and the wafer backside may be covered by a protective layer of resist. Electroless Ni-Au plating also requires that all exposed metal other than the pads be passivated or covered with resist. Or, to put it another way, all exposed aluminum will be plated with nickel, whether you want it or not.

The plating baths must be carefully controlled and kept free of contaminants to insure uniform plating. The bath composition may be varied depending on the wafer materials. For example, some wafers have polyamide passivation coatings instead of nitride or glass passivation. Polyamide does not mix well with alkaline chemistries, so an acid chemistry may be used if polyamide is present. The plating chemistry must react properly with the thin aluminum pad, but not so aggressively as to produce as to produce a too-narrow process window. Generally sample die are used to adjust the process for a specific wafer metallurgy before production plating.

The zincation process removes the native aluminum oxide, and replaces it with a thin layer of zinc. Much of the process optimization "magic" involves insuring that this zinc layer is homogenous, fine grained, and has good adhesion to the underlying aluminum. A double-zincation process is frequently used to assure this.

After zincation, nickel is deposited from a hypophosphate-based nickel bath. The thickness of nickel deposited depends on the plating time, with typical deposition rates of 20 to 25 micrometers per hour. While UBM applications may require only a few microns of nickel, bumps may require as much as 20 to 30 microns, depending on the assembly process. A thin layer of immersion gold is plated over the zinc to protect the surface from oxidizing.>

FIGURE 1 is a cross-section drawing of an electroless Ni-Au bump. The central layer (red) is the final metal pad. The electroless nickel (blue) deposits in the passivation (green) opening, widening over the top of the passivation as bump height increases.

Ni-Au bumps generally are assembled with isotropic conductive adhesives. Because of the flat, hard nickel bumps, anisotropic adhesive films or pastes are not commonly used with Ni-Au bumps. As described and illustrated in Tutorial 3 for Gold Stud Bump flip chip, the conductive adhesive may be either stenciled onto the substrate pads, or the bumped die may be dipped into a thin layer of conductive adhesive, to coat the bump.

FIGURE 2 is a Ni-Au bump after dipping in conductive adhesive. The rounded-corner "loaf" shape is typical of electroless plated bumps. Conductive silver particles in the adhesive can be seen coating the bonding surface.

Assembly in a flip chip aligner-bonder may be onto ceramic or organic rigid or flex substrates. After curing the conductive adhesive, a non-conductive underfill may be applied to the under-chip space by capillary action, and heat-cured.

FIGURE 3 shows a SEM cross-section of a Ni-Au bump assembled with stenciled conductive adhesive. The conductive adhesive forms a fillet of fine-grained silver particles around the bonding surface, while the underfill adhesive fills the remaining space. The curvature at the bump edge illustrates the height-width equality relationship discussed below.

The electroless Ni-Au bumping process has cost advantages resulting from eliminating the masking and metal sputtering required by other methods, and from allowing parallel batch processing of multiple wafers, which increases throughput and reduces costs. The process is scaleable to larger wafer sizes, as long as plating solutions are well controlled. The resulting bumps are of uniform height, with reported across-wafer variations as low as 1 micrometer on 20 micrometer bumps.

Electroless Ni-Au plating requires that all exposed metal other than the pads be passivated or covered with resist. The back side of the wafer may also require protection with photoresist. The plating baths must be carefully controlled and kept free of contaminants to insure uniform plating.

Plated bump pitch is limited by the bump height. The plating process is non-directional, so that the width of the plated bump increases directly with the height. This means that higher bumps are also wider and must be spaced at proportionally wider pitch. It also accounts for the rounded corners, and the height-width curvature of Figure 3. The extension of the bump in width beyond the original pad equals the height of the bump above the passivation.

Both electroless Ni-Au wafer bumping alone, and bumping with assembly are available as services. One supplier reported producing one million assemblies a month with Ni-Au bumps and stenciled adhesive assembly. Technology transfer of the Ni-Au process and automated equipment for a complete Ni-Au production line is also available. Sources include PAC TECH on this site.

Electroless plating may be the lowest cost approach to bumping, because it eliminates thin film and masking steps and permits batch processing. It has some limitations in height versus pitch and in assembly methods, but is widely available.

J. Simon, A. Ostmann, and H.Reichl, "Electroless Bumping for TAB and Flip Chip," Proc. ISHM '93, Dallas, TX, September 1993.

J. Audet, L. Belanger, G. Brouillette, D. Danovitch, V. Oberon, "Low Cost Bumping Process For Flip Chip," '95 Flip Chip, BGA, TAB & AP Symposium, pp.16-21, 1995

E. Zakel and H. Reichl, Flip Chip Assembly Using Gold, Gold-Tin, and Nickel-Gold Metallurgy," in J. Lau (Ed.), "Flip Chip Technologies", McGraw-Hill, New York, 1995, pp.415-490.

G. Riley, "A Comparison of Flip Chip Bumps," NEPCON Texas '97, Dallas, TX, October 1997, pp.121-127.

J. Lau, "Flip Chip on PCBs," Advanced Packaging, July-August 1998, pp. 44-48.

"A Bumping Process for 12" Wafers" T. Oppert, T. Teutsch, E. Zakel, D. Tovar
International Electronics Manufacturing Symposium (24th IEMT) Austin, Texas October 1999
A low-cost bumping process with Ni-Au UBM.
FULL TEXT

"Low Cost Flip Chip Technologies," John H. Lau McGraw-Hill, NY, 2000. ISBN 0-07-135141-8
A broad survey and comparison of flip chip bumping and assembly techniques.

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