This is the fifth in a series of flip chip tutorials intended for new flip chip users and potential users. Tutorial #1 presented the basics: an overview of what flip chip is and does, and how it is made. Further tutorials, also found in the Archives, explain the topics in more detail. Concurrently, FlipChips Dot Com’s Technology Updates present industry experts describing the newest developments in their fields; our Literature and Photo pages give supplemental material.

Anisotropic conductive film, commonly known as ACF, is a lead-free and environmentally-friendly epoxy system that has been used for almost 30 years in the flat panel display industry to make the electrical and mechanical connections from the drive electronics to the glass substrates of the displays. In the past decade, these chip-on-glass (COG) applications show an increasing focus on ever-higher signal densities and ever-smaller overall display packages. Display manufacturers now think nothing of placing several thousand I/Os (up to 4,000 on high-end displays), spread over 1 to 12 ICs, onto a single substrate worth itself perhaps $500, and then entrusting the entire package to an ACF bonding process.

This growing confidence in ACF has, in the past two years, spilled over the edge of the glass display world to more and more ACF chip-on-film (A-COF) and ACF chip-on-board (A-COB) applications. The shift is led by the telecommunications industry, where manufacturers have been driven to pursue every advantage in price, packaging, and functionality. This tutorial explains the basic technological and economic underpinnings of the shift.

ACF started as a solution to provide low-cost reliable interconnection for the first wave of small, cheap calculators coming out of Japan. The first materials were thermoplastic, supporting center to center pitches of 1.0mm down to perhaps 0.7mm. By the mid-1980s, the pitches were down in the 0.2mm range and thermoplastic adhesives were dropped in favor of more reliable thermoset epoxies. Improvements in thermoset ACF have brought us to today’s limit of 800µm² pads with 10µm spaces between them.

How ACF Works

ACF works by trapping conductive particles between the corresponding conductive pads on the IC and the substrate. ACF consists of a very stable matrix of 3-5µ polymer spheres, each nickel-gold plated and then coated with a final insulating layer that protects them against shorting through contact with a neighboring particle. The insulated particles are distributed in such a way that their incidental contacts in the X and Y axes are low.
During the bonding process, the insulation in the Z-axis where the balls are trapped is pushed away, allowing the Ni-Au layer on the particle to conduct electricity between the IC and the substrate, while not shorting in the X and Y directions. The epoxy cures, locking the particles in this compressed state.
The elasticity of the compressed trapped particles causes them to constantly press outward on both contact points, helping to maintain electrical connections through a wide range of environmental conditions. Improvements in particle uniformity, dispersion, and particle coating technologies have allowed ACF now to match or exceed the reliability of older solder technologies.

The assembly process is simple, lending itself to a high level of automation and reliability.

Step 1: Prepare the substrate. The material can be FR4, FR5, BT, ceramic, build-up, polyimide, or any other standard board material. Its only requirement is that it be gold plated and clean.
Step 2: Laminate the ACF to the substrate. Typically this is done by cutting the required length of ACF from a reel of ACF pre-slit to the required width. The ACF is laid in place over the bonding area and 2-3 Kg/cm2 of force is applied for 3-5 seconds at 90-100°C.
Step 3: The ACF has a release liner on its rear surface to prevent the bondhead from adhering to the ACF during the lamination procedure. This must be removed without damaging the ACF layer or causing any delamination within the bonding area.
Step 4: The IC is then aligned to the substrate and lightly tacked in place. Alignment is done through the ACF by looking at the reflective gold beneath it, and the tacking is done either with low heat (50°C) or no heat. Very light pressure (1 Kg/cm2) is used.
Step 5: The final process subjects the ACF to high heat and temperature, permanently curing the epoxy and attaching the IC to the substrate. A typical bonding profile will be 150-210°C and 40-300 grams/bump for 5-20 seconds.

ACF has now been qualified by five Japanese IC packaging houses for use in CSPs. FIGURE 1 (14 kb) shows a cellular phone board utilizing an ASIC bonded with ACF to an organic substrate, which in turn makes a solder-ball based connection to the motherboard. This particular phone was introduced to the market in 1999. It and many ACF-based successors currently total several tens of millions of phones in customer hands.

ACF has also been qualified by three Japanese companies for use in MCMs. FIGURE 2 (17 kb) is an example from a handheld digital radio. The five unpackaged ICs on the board were all attached using ACF. Many other examples can be found in PDAs. A-COB assemblies are also being used in very challenging applications, technically far more difficult than the high-volume commercial applications.

The most common type of ACF package currently being manufactured, with estimated quantities as high as 12,000,000 units per month, is the COF display driver package used in many of the most advanced handheld information display devices. These assemblies combine one or more ICs with passive components on a thin polyimide film to allow high-density interconnection to liquid crystal displays.

COB and MCM interconnections are presently limited to 0.080mm pitch (center-to-center) because of the difficulty in manufacturing fine-pitch substrates. However, COF packages regularly use 0.060mm pitches for the IC-film connection, and 0.040mm pitches are now in high volume production for a small number of designs. FIGURE 3 (10 kb) shows a Sony HyperFlex substrate without the IC. The IC would be bonded to the center area using ACF, followed by standard solder reflow to attach the adjacent passive components.

The last sentence in the previous paragraph often causes people unfamiliar with ACF to pause and reread it, because they assume that any solder processes must take place prior to the ACF bonding process. In fact, A-COF and A-COB packages now quite commonly pass JEDEC Level 1 certification. All of the examples given in this introduction had at least one solder reflow process performed after the ACF bond. The ability of ACF to withstand multiple solder reflows was a major milestone in its growing acceptance within the semiconductor packaging industry.

The semiconductor industry, while always investigating and using new technologies in high-end applications, relentlessly seeks lower costs for high-volume applications. ACF offers cost savings over older technologies. While cost models vary, a subset of cost drivers has emerged which show ACF as not only the most space-effective packaging method for certain applications, but also the most cost-effective method. These cost drivers are die size, redistribution layers, substrate costs, and underfill.

Die size is easily understood if one considers that pad sizes as small as 800µm² and pad-to-pad gaps of only 15µm are now commercial realities in A-COF applications and will soon work their way into A-COB. Rather than increase the die size to allow larger peripheral pads or a larger peripheral pitch to meet wire-bonding constraints, designers using ACF can use much smaller and finer-pitch pads, reducing die size and cost.

Similarly, in current non-ACF flipchip applications, the designer may be forced to use an area array under the die to increase pad size and spacing while reducing die size and cost. However, this array requires additional redistribution layers within the die and on the substrate, negating the cost benefits of die size reduction. ACF lets the designer reduce die size while maintaining only peripheral pads that require no redistribution layer on the die, and often do not require one on the substrate, further reducing cost.

ACF also eliminates the need for solder resist under the die and between the contact pads. The solder mask required for C4 and other solder-based processes greatly reduces yields at board houses. Eliminating solder resist can significantly lower costs.

Lastly, ACF has the further advantage of requiring no underfill, even for very large die, eliminating that time-consuming and expensive step.

ACF is gaining wide acceptance among Asian end-users and semiconductor packaging houses. Its relatively slower acceptance in the United States and Europe may reflect Asia’s 30 years of favorable experience with ACF in displays. However, the reliability, packaging, and cost advantages of ACF cannot be long ignored. Particularly in the hypercompetitive semiconductor arena, where cost, functionality, and reliability are continually driven to new levels, ACF represents the bright future for middle and high-end manufacturing. As I/O counts become higher, more and more IC designers and users will find that fine-pitch, small-package, high-reliability ACF is their best choice.

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