Embedding of Thinned Chips in Plastic Substrates

Nowadays more and more electronic devices are being used in our day-to-day life. We all know very well larger products as personal computers and mobile phones, and although smaller devices like smart cards and RFID tags mostly stay unnoticed, they are still there and even entering our environment at a fast rate.

Because the technologies used in production are developed for the lowest cost possible and the base materials are chosen to be as cheap as possible, large volumes are being produced and are also entering the market. At the moment the functionality of these small electronic devices is still low and mostly limited to one application per device. Therefore very small chips can be used with very few contacts that allow enough reliability for the mostly short lifetime of the product. However it is expected that this functionality will rise, causing also the chip size to rise. This is where problems will arise. As the base substrates for these cheap electronics are mostly flexible, larger dies will be affected more by bending of the complete device than the small chips. The use of very thin chips in this technology is inevitable as this will ensure at least some bendability. Furthermore the overall adhesion and in particular the interconnections between the chip and the board will have to absorb much more stress during bending than when using the small dies. Tests with larger chips interconnected using flip chip on a plastic substrate have pointed out that the most important reason for failures is the stress due to bending.

A different approach to overcome this issue is to embed the chip inside the substrate. This paper describes work done on embedding thin chips into low-cost substrates as PES and PET. This new technology starts with making a hole inside the plastic substrate by laser drilling or punching. The next step is then to partially fill this cavity, place the chip inside and fill it up completely, using an encapsulant. The used chip is very thin, approximately 30 micron, as compared to the substrate, 100 up to 150 micron thick. After curing the encapsulant, the pads of the chip are opened using laser ablation to be able to make an electrical contact to the chip through this via. When a printing or jetting technology is used to create the conductive tracks on the substrate, this step can also be used to fill up the vias leading to the chip. One of the advantages of embedding is when a brittle matter is inserted into two flexible layers, this reduces the chance of cracks in this brittle interlayer significantly. Also the usually rigid and non-flexible interconnections between the pads of the chip and the substrate are replaced by vias which are filled with a flexible electrical conductor.

As this is still a technology in early development, this paper mainly focuses on the technological side of the embedding. The electrical characteristics and reliability test results will be described in a following paper.