Electroless Nickel-Gold Flip Chip and CSP Reliability

The demand for solder bumping has increased dramatically in the last several years. A majority of the Flip Chip (FC) and Chip Scale Packaging (CSP) parts which are being bumped use thin film technologies for depositing the Under Bump Metallurgy (UBM). As the markets for both these products grow, cost pressures are forcing the industry to look at alternatives to these thin film manufacturing technologies.

A well known alternative is to use an electroless nickel/gold process to produce a thick film UBM. This technology does not require any high vacuum or photolithography equipment to form the metal stack on top of the I/O pads. The proliferation of electroless nickel/gold for UBM applications has been limited because a number of early programs did not have adequate process controls, or the process was practiced on incompatible devices.

In this paper, the process controls for FlipChip's recently announced EliteFC^TM and EliteCSP^TM product lines, will be discussed in relation to a multilevel reliability study. This paper addresses the process variables of nickel plating on various copper doping levels in the aluminum pad metallurgies of the IC, eutectic versus lead free solders alloys, and compares the plated e-nickel/gold to sputtered AlNiVCu.

The wafer level tests in this study, include: multiple reflow, autoclave, and shear analysis. Board level tests include: high temperature storage, thermal cycle, and drop testing. The flip chip test vehicle used in this study is the well known PB08 daisy chain device which contains 80µm passivation openings on a 200µm pitch. Solder deposition was accomplished using FlipChip's industry proven sub-100µm printed paste process. The CSP test vehicle (CSP50) was designed with 280µm sized UBM pads on a 0.5mm pitch. The solder was deposited by dropping preformed 300µm spheres onto the wafer.