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IMAPS International Symposium 2003
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Wafer Level Vacuum Cavity Packaging for MEMS, Optoelectronics, and Sensors Dr. George A. Riley
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Wafer-level chip-scale packaging (WLCSP) combines the conventional chip-scale package advantages of testability and ease of handling with the added potential of lower-cost volume production. Cavity wafer-level packaging also offers mechanical protection, beginning at the wafer level, for devices with fragile surface features, such as MEMS, optoelectronics, and sensors. While some of these devices require only a controlled ambient atmosphere in the cavity, others function best in vacuum. Wafer-level packaging of vacuum cavities has the further advantage of simultaneously sealing an entire wafer of cavities in vacuum. This eliminates the manufacturing inefficiencies and the costs of individual "pump down and pinch off" metal or ceramic vacuum packages. This paper surveys some present and developing technical approaches and challenges to wafer level vacuum cavity chip-scale packaging. |