PREPUBLICATION ABSTRACT

SMTA Pan Pacific
February 10 - 12, 2009
CONFERENCE INFORMATION

 

3D-LSI Technology for the Image Sensor Devices

Makoto Motoyoshi, Hirofumi Nakamura,  Manabu Bonkohara

ZyCube Co., Ltd.

 

 Recently the development of three-dimensional large-scale integration (3D-LSI) has been accelerated and its stage has changed from the research level or limited production level to the investigation level with a view to mass production. This paper describes the current and future 3D-LSI technologies with TSV focused on image sensor. Semiconductor integration technology has been widely spread in 2 dimensional over the past three decades. The reasons for this rapid progress are due largely to good scalability of MOS devices in technology base and prediction of the dimension for the next generation LSIs in accordance with Moor’s law in product and business base. But in recent years, the actual device has become to deviate from the ideal scaling theory. The main cause is difficulty of operation voltage scaling. The value of kT/q does not scale down and thus lowering threshold voltage (Vth) of MOS transistor is difficult without increasing subthreshold leakage. Without Vth scaling, power and performance became a trade-off. Under this circumstance, in order to bring out high performance from LSI chips while restricting their power, there are two approaches. One is reconsidering circuits and system architecture from view point of power consumption. Another is concerning LSI structure. In recent devices, the signal propagation delay is mainly determined by wiring length and pin capacitance. The 3D-LSI is the one solution to improve performance without increase of power consumption. One of the key issues to realize 3D-LSI is the method of the information transfer and the supply of electric power among stacked chips. There are many methods to connect inter-chip, such as wire-bonding, edge connect, capacitive or inductive coupling method, and direct contact using TSV. The 3D-LSI using TSV has simplest structure and it is expected to realize high-performance, high-functionality and high density LSI cube. In an ideal image sensor, pinouts are preferably located on the opposite side from the sensor array.?By applying TSV to an existing image sensor LSI, we can easily to fabricate the ideal one.? This does not have a real 3-D LSI structure with stacked chips, but it applies many of the same technology features such as TSV, wafer thinning and bump formation. Moreover image sensor device is sensitive to the process induced damage. Therefore it is suitable vehicle to develop the 3D-LSI process module and easy to expand the real 3D-stacked structure, to include a sensor with DSP, or a sensor with memory and DSP etc. In this paper, the process and structure of the CSP for CMOS image sensor is presented. The more advanced sensor applications with fine pitch TSV are high speed image sensors with parallel data processing and high sensitive image sensor with Backside illumination of CMOS image sensor device. 3D-LSI technology will allow high-speed signal processing and 100 % optical fill factor.