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SMTA International 2006
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Qualitative evaluation of flip chip solder bumps produced by stencil printing of solder paste on variable Electroless Ni/Au metallizations
D.Manessis1, L. Boettcher , R. Patzelt1 B. Schild, A. Ostmann , R. Aschenbrenner, H. Reichl |
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The continuous striving of the microelectronics packaging industry towards further miniaturization of electronic products has relied heavily on the fast evolution of Flip Chip wafer bumping technologies. Stencil printing of Sn-Pb and lead-free solder pastes in conjunction with electroless Ni/Au deposition for Under Bump Metallization (UBM) offers a cost-effective alternative technology for wafer bumping and therefore it has become increasingly accepted in industry. The scope of the proposed study is to examine in depth the effect of varying the deposition time/thickness of electroless Ni/Au on the solder bump interface characteristics and on its 1st level reliability performance. It intends to elucidate the role of Au flash on electroless Ni UBM. Therefore, the study includes also wafers only with electroless Ni UBM without Au flash deposition. The proposed study will also reveal the effect of varying the deposition time/thickness of Au on the final Au grain microstructure which can potentially affect the solder adhesion on the UBM. The favoured Au deposition thickness will be suggested. The results of our study can have significant economical importance because of the potential reduction of the Au flash layer needed for electroless Ni/Au UBM's. Solder paste stencil printing technology for flip chip bumping has been a core competency at Fraunhofer IZM/TUB and the current capabilities extend up to 100µm pitch peripheral array bumping and 120µm for area-array structures. In the proposed study, 6-inch wafers with 300µm and 200µm pitch peripheral pad arrays were bumped using type 6 Sn4Ag0.5Cu pastes as well as Sn63Pb37 pastes for comparison study. A laser-cut stencil of 75µm was used and a bump height of 108µm was achieved at 200µm pitch. In order to study the effect of Au flash thickness, wafers were processed without Au (only 5µm E-less Ni), 5µm Ni/20nm Au, and 5µm Ni/80nm Au. Bumped chips were exposed to high temperature storage at 150oC up to 1000hrs, thermal cycling tests from -55oC to 125 oC and up to 10x reflow repetitions. A detailed analysis of the bump/UBM interface characteristics before and after testing will be presented. The Sn-Pb and lead-free interface adhesion on the variable Ni/Au UBM's was evaluated based on shear strength measurements of the bump/Ni-Au interface. The shear failure modes will be discussed and recommendations for the optimum Electroless Ni/Au thickness will be given. |