Direct Bonding of SU-8 Cavities over MEMS Components

Packaging of microstructures such as flow channels, fluid reservoirs, and particularly sensors and actuators is important for the commercialization of numerous MEMS applications among. Frequently, packaging costs of MEMS devices exceed 50% of the total device cost. Achieving a wafer-scale packaging process with simple and inexpensive materials and processes will be required for economical mass production of MEMS components. Furthermore, processes that are compatible with conventional IC wafer processing techniques are attractive due to the ability to integrate the wafer component and the package component seamlessly.

We will evaluate a recently disclosed MEMS packaging process wherein the package side is manufactured independent of the device component and then the two sides are bonded together at the wafer level using a low-temperature bonding process1. The ability to process SU-8 on transparent polyethylene terephthalate (PET) allows for alignment to the populated substrate as well as for alignment to subsequent layers during patterning. The SU-8 process allows one to achieve bonding without complex fabrication approaches. In addition, the process provides structures that are mechanically rigid and also resistant to variety of chemical environments.

We have found that the processing of the MicroForm™ 3000 laminates at lower post-exposure bake (PEB) temperatures and shorter times than typically used for SU-8 processing allows for partial cross-linking of the laminate which can still be readily developed to give excellent images. Further, we have found that the partially cured SU-8 provides excellent adhesion at low bonding temperatures to a wide range of typical. We will examine the process of forming multilayered 3-dimensional SU-8 structures and bonding them to silicon or glass substrates. Process optimization experiments will be discussed with emphasis on the SU-8 processing parameters and adhesion performance of SU-8 layers under various temperature and pressure conditions for wafer bonding.