PREPUBLICATION ABSTRACT

SMTA International 2009
San Diego CA, October, 2009
CONFERENCE INFORMATION

 

Innovative package realization by Chip Embedding Technologies

L. Boettcher (1), D. Manessis (2), S. Karaszkiewicz (1), A. Ostmann (1)  H. Reichl (2)

(1) Fraunhofer Institute for Reliability and Microintegration (IZM)
(2)Technical University of Berlin

 

In the framework of the European project "Hermes" innovative chip-in-polymer technologies are employed and further developed for chip embedding and active component integration in printed circuit boards in order to achieve maximum miniaturisation, superior electrical performance and functionality due to much shorter interconnections. The final focus is the implementation of chip embedding technologies at industrial level.

This paper will briefly discuss the necessary process steps of the Chip-in-Polymer technology and more importantly it will focus on new efforts to actually use chip embedding concepts for the realization of standard-type industrial Quad Flat Packages with embedded chips (embedded chip QFN). Chips of 50 µm thickness, a pad pitch of 100 µm and pad size of 85 µm are die bonded to a copper substrate and subsequently embedded in RCC (Resin-Coated-Copper) layers by using vacuum lamination. Different epoxy materials and their influence to package reliability were investigated, with a focus on environmental friendly, halogen-free materials.

The resulting QFN packages are only 160 µm thick and provide standard pads at 400 µm pitch and a total number of 84 I/Os with dimensions of 10x10 mm2. All embedded chip QFN packages at prototype level are manufactured in 250x300 mm2 panels.

Ultra fine line copper structuring becomes more and more important to realize the copper re-routing for the embedded chip packages. The complexity of the needed patterns for the development of embedded chip packages with pad pitches down to 100µm and below, and the need of working in large panel formats have necessitated to use a laser direct imaging (LDI). A Laser Direct Imaging (LDI) system enables finer structures, by the use of a dry film photo resist and the exposure by direct writing with the UV laser beam.

A copper semi-additive technology for new generations of embedded chip packages becomes interesting due to its potential for very fine copper patterning. Development results on very fine (L/S of 15-20µm) will be shown based on the semi-additive processes. In specific, the process development based on a very thin base copper as starting layer in combination with a thin dry film resist, structured by the LDI system, and following electroplating of copper will be discussed in detail.