Design & Features of a New 3D Interconnect for Package-on-Package Stacking: Through Package Interconnect (TPI)

Driven largely by the wireless handset market, a number of advanced packaging options have emerged to take on the challenges & requirements for faster, and better devices in a smaller form factor. While Package-on-Package (PoP) has emerged as one of the platform of choices, many developments are still underway to address the technical challenges faced during assembly. Most importantly, there is a need for a practical and innovative solution to meet the required technical performances at the lowest possible cost.

The paper will focus on how the design and features of a new 3D interconnect technology "Through Package Interconnect" (TPI) can be used to deliver low cost, higher capacity & density for Package-on-Package stacking. Essentially, TPI uses embedded copper pins as vertical interconnect to facilitate the stacking and packages are built using existing matured assembly infrastructure. From assembly viewpoint, the technology provides superior rigidity support with minimal warpage during processing and helps to achieve the desired package co-planarity. The paper will also highlight key challenges of various vertical interconnection approaches such as solder ball z-interconnect to deliver low cost, high yield 3D package structure.