Authors: Erik Jung, Maik Wiemer*, Volker Grosser, Karlheinz Bock**, Jürgen Wolf

FhG-IZM Gustav-Meyer-Allee 25, 13355 Berlin, *Chemnitz, **Munich

erju@izm.fhg.de

MEMS devices may exhibit delicate structures sensitive to damage during handling or from environmental influences. Their functionality may furthermore depend on sealing out the ambient, or being in direct contact with it. Exposure to mechanical stress, thermal load or environmental contamination may change the device characteristics.

Packaging technology is challenged to extend from microelectronics to MEMS and MOEMS packaging. Today’s MEMS and MOEMS packaging typically relies on housing the miniature devices in bulky ceramic or metal cases, or on putting them into very high volume production, which can benefit from the microelectronics packaging infrastructure. Alternatively, instead of focusing on available technology, device manufacturers develop individual packages for their product, typically at a high cost.

While there is nowadays a good infrastructure for MEMS development from universities to MEMS foundries, packaging still remains as a bottleneck at the end of the design cycle, sometimes preventing a device from being commercialised. Selecting the proper packaging method may tip the scales towards a product success or towards a product failure. Choosing the right technology therefore is not a marginal concern, but a crucial part of the product design. Small and Medium Sized Enterprises (SME) often lack both the expertise and the infrastructure for full wafer level packaging, which leads to high-volume, cost intensive solutions.

Die-to-Wafer packaging opens a way to benefit from processes close to wafer level processing, while maintaining the flexibility to utilize single chips instead of wafers, as is realized in MUMPs foundry processes. This paper identifies the challenges and highlights some solutions to this Die-to-Wafer packaging option.

Key Words: MEMS packaging, single die packaging, die to wafer packaging, wafer level packaging